1. Field of the Invention
The present invention relates to a semiconductor device including function verification capability for performing function verification for target function blocks by supplying optional input data to the target function blocks at desired timings.
2. Description of the Related Art
In the evaluation for processor development, when a pipeline dependent operation verification program for a target processor is written in a computer language, there is a case in which optional values are adopted for optional pins and registers at optional timings. For example, in a simulation of RTL (Register Transfer Level), it is necessary to set additional input data by a simulator in order to verify a function relating to input data caused by an external interrupt.
On the other hand, when a processor is used as IP (Intellectual Property, as a function block), it is necessary to verify an operation with consideration given to external input data. However, it is difficult, in general, to prepare verification programs according to a specification per IP connected externally. Moreover, when a pipeline dependent verification program is executed in an actual application device, it is inefficiency to set data into registers based on scan path manner. Further, it is necessary to set an additional device for setting external input data for a verification program for verifying a function using external input data.
As described above, in the operation verification with consideration given to the external input data to be supplied to the processor, it is necessary to perform the setting by a simulator and to use a verification program per target IP in order to supply an optional input data at a desired timing. Furthermore, to set the input data based on scan path manner is inefficiency, and it is necessary to use additional device for setting external input data.